The decrease in semiconductor device feature size and device working operating voltages has made the semiconductor device increasingly vulnerable to Electrostatic Discharge (ESD). ESD can be triggered in a semiconductor device by any unforeseen buildup of electromagnetic fields that effect current carrier distribution and existing magnetic fields in the semiconductor device. To prevent this kind of damage, an ESD protection circuit is typically included in the design of a semiconductor device.
The essential function of the ESD protection circuit is to direct transient ESD currents away from the circuits that need protection. An example of such circuits include CMOS, MOSFETs, memory circuits and other semiconductor devices and applications that are susceptible to damage from unwanted transients. Another typical application of ESD protection circuits relates to the packaging of individual dies into multi-chip module which require the use of a number of pads that interconnect the individual die into a multi-die package. Furthermore, during testing, a die is susceptible to ESD damage as the die is brought in contact with test equipment by means of contact bonds. These contact bonds are subject to introduction of ESD damage to the device under testing conditions, and the use of ESD protection circuits is required in order to avoid damage to the device.
Protection ESD circuits are typically located between input and output pads on the die. The ESD circuits provide a path of conductance from the input/output pads, the ground pad, or to a power or bias voltage path for the die. Arrangement of ESD protection circuits are commonly employed so that a single circuit is dedicated to a single input or output path in the device.
Most ESD protection schemes use two devices to provide an alternate path for transient currents that would otherwise damage the circuit to be protected. A fast device will take the sharp transient with low power while a slower device will take the bulk of the current. Normally, slow devices are of the SCR type or transistor diodes with SCR characteristics. Most of them function as a secondary snapback or provide for some type of secondary breakdown as an extension of snapback at very high power levels.
While prior art two device ESD protection configurations have proven suitable in the past, they are not well suited for a number of applications where smaller device geometries require lower operating voltages. For example, with 0.18 micron CMOS, 1½ to 2 volts are used to ensure adequate reliability. For such technologies, therefore, it is necessary to also reduce the threshold voltages of the input protection device. However, doing so with standard ESD protection components results in an increase of the leakage currents across the protection transistors which are too high for many of today's applications.
Accordingly, a need exists for a way of providing ESD input protection that reduces leakage currents in applications with low operating threshold voltages.